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US06700143B2 Dummy structures that protect circuit elements during polishing 有权
在抛光期间保护电路元件的虚拟结构

  • Patent Title: Dummy structures that protect circuit elements during polishing
  • Patent Title (中): 在抛光期间保护电路元件的虚拟结构
  • Application No.: US10165741
    Application Date: 2002-06-06
  • Publication No.: US06700143B2
    Publication Date: 2004-03-02
  • Inventor: Hsing Ti Tuan , Chung Wai Leung
  • Applicant: Hsing Ti Tuan , Chung Wai Leung
  • Main IPC: H01L31119
  • IPC: H01L31119
Dummy structures that protect circuit elements during polishing
Abstract:
Circuit elements (e.g. transistor gates) formed over a semiconductor substrate are protected by adjacent dummy structures during mechanical or chemical mechanical polishing of an overlying dielectric.
Abstract(Chinese):

形成在半导体衬底上的电路元件（例如晶体管栅极）在上覆电介质的机械或化学机械抛光期间被相邻的虚设结构保护。

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