发明授权
- 专利标题: Single chip VLSI implementation of a digital receiver employing orthogonal frequency division multiplexing
- 专利标题(中): 采用正交频分复用的数字接收机的单芯片VLSI实现
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申请号: US09995011申请日: 2001-11-27
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公开(公告)号: US06687315B2公开(公告)日: 2004-02-03
- 发明人: Peter A Keevill , Dawood Alam , John M. Nolan , Matthew J Collins , Thomas Foxcroft , David H. Davies , Jonathan Parker
- 申请人: Peter A Keevill , Dawood Alam , John M. Nolan , Matthew J Collins , Thomas Foxcroft , David H. Davies , Jonathan Parker
- 主分类号: H03D100
- IPC分类号: H03D100
摘要:
The invention provides a single chip implementation of a digital receiver for multicarrier signals that are transmitted by orthogonal frequency division multiplexing. Improved channel estimation and correction circuitry are provided. The receiver has highly accurate sampling rate control and frequency control circuitry. BCH decoding of tps data carriers is achieved with minimal resources with an arrangement that includes a small Galois field multiplier. An improved FFT window synchronization circuit is coupled to the resampling circuit for locating the boundary of the guard interval transmitted with the active frame of the signal. A real-time pipelined FFT processor is operationally associated with the FFT window synchronization circuit and operates with reduced memory requirements.
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