Invention Grant
US06645810B2 Method to fabricate MIM capacitor using damascene process 失效
使用镶嵌工艺制造MIM电容器的方法

  • Patent Title: Method to fabricate MIM capacitor using damascene process
  • Patent Title (中): 使用镶嵌工艺制造MIM电容器的方法
  • Application No.: US10012292
    Application Date: 2001-11-13
  • Publication No.: US06645810B2
    Publication Date: 2003-11-11
  • Inventor: Chit Hwei NgChaw Sing Ho
  • Applicant: Chit Hwei NgChaw Sing Ho
  • Main IPC: H01L218242
  • IPC: H01L218242
Method to fabricate MIM capacitor using damascene process
Abstract:
In one embodiment, the present invention recites forming a number of first openings in a first substrate. The present embodiment then recites forming a copper region within each first openings during a damascene process, wherein each copper region has a top surface. The present embodiment then disposes a dielectric layer proximate to the top surface of each of the first copper regions during the damascene process. After depositing a second substrate over the dielectric, a number of second openings in a second substrate are made. Next, a number of second copper regions are formed in the second openings, during the damascene process. The dielectric region is thus disposed between the first copper regions and the second copper regions. In so doing, the dielectric region forms a dielectric barrier between the first copper regions and the second copper regions such that a metal-insulator-metal (MIM) capacitor is formed during a damascene process.
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