Invention Grant
US06633082B1 Semiconductor device and method for manufacturing the semiconductor device 失效
具有多层布线和低介电常数层间绝缘膜的半导体器件

  • Patent Title: Semiconductor device and method for manufacturing the semiconductor device
  • Patent Title (中): 具有多层布线和低介电常数层间绝缘膜的半导体器件
  • Application No.: US09088048
    Application Date: 1998-06-01
  • Publication No.: US06633082B1
    Publication Date: 2003-10-14
  • Inventor: Noriaki OdaAkira Matsumoto
  • Applicant: Noriaki OdaAkira Matsumoto
  • Priority: JP9-142447 19970530
  • Main IPC: H01L2968
  • IPC: H01L2968
Semiconductor device and method for manufacturing the semiconductor device
Abstract:
A semiconductor device is provided and contains a substrate, a first wiring layer, a first oxide film, a dielectric film, a first nitrogen layer, a second wiring layer, a via hole, and a second nitrogen layer. The first wiring layer is formed on the substrate, and the first oxide film formed on the first wiring layer. The dielectric film has a low dielectric constant and is disposed between the first and second wiring layers. The first nitrogen layer contains nitrogen and is formed in the first oxide film. The via hole is formed through the dielectric film and is disposed between the first wiring layer and the second wiring layer for electrically connecting the first wiring layer and the second wiring layer. The second nitrogen layer contains nitrogen and is formed on a side wall of the via hole. Since the first and second nitrogen layers prevent moisture from spreading to various portions of the semiconductor device, leak current between adjacent wirings of the wiring layers is prevented. Also, the chances that an opening will not form in the via hole when the via hole is created is reduced.
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