A phase-locked loop circuit includes a phase detector for comparing the phase of a reference clock signal with the phase of a feedback clock signal and detecting a phase difference between the two; a loop filter in signal communication with the phase detector; a fast frequency lock control circuit in signal communication with the phase detector for disconnecting the phase detector from the loop filter at the initial stage of power on of the phase-locked loop circuit, at least one of supplying constant current to the loop filter for a predetermined time duration and emitting constant current from the loop filter, and then connecting the phase detector to the loop filter; a voltage controlled oscillator in signal communication with the loop filter for generating an output clock signal and varying the frequency of the output clock signal in response to output voltage of the loop filter; and a divider in signal communication with the voltage controlled oscillator for dividing the output clock signal at a predetermined division rate and supplying the divided clock signal as the feedback clock signal.