Invention Grant
US06410429B1 Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions
失效
具有超浅结的无空隙外延CoSi2的制造方法
- Patent Title: Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow junctions
- Patent Title (中): 具有超浅结的无空隙外延CoSi2的制造方法
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Application No.: US09795113Application Date: 2001-03-01
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Publication No.: US06410429B1Publication Date: 2002-06-25
- Inventor: Chaw Sing Ho , Kheng Chok Tee , Kin Leong Pey , G. Karunasiri , Soo Jin Chua , Kong Hean Lee , Alex Kalhung See
- Applicant: Chaw Sing Ho , Kheng Chok Tee , Kin Leong Pey , G. Karunasiri , Soo Jin Chua , Kong Hean Lee , Alex Kalhung See
- Main IPC: H01L2144
- IPC: H01L2144

Abstract:
A method for forming a void-free epitaxial cobalt silicide (CoSi2) layer on an ultra-shallow source/drain junction. A patterned silicon structure is cleaned using HF. A first titanium layer, a cobalt layer, and a second titanium layer are successively formed on the patterned silicon substrate. The patterned silicon substrate is annealed at a temperature of between about 550° C. and 580° C. in a nitrogen ambient at atmospheric pressure; whereby the cobalt migrates downward and reacts with the silicon structure to form a CoSi2/CoSi layer, and the first titanium layer migrates upward and the first titanium layer and the second titanium layer react with the nitrigen ambient to form TiN. The TiN and unreacted cobalt are removed. The silicon structure is annealed at a temperature of between about 825° C. and 875° C. to convert the CoSi2/CoSi layer to a CoSi2 layer. The CoSi2 layer can optionally be implanted with impurity ions which are subsequently diffused to form ultra-shallow junctions.
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