Invention Grant
US06340326B1 System and method for controlled polishing and planarization of semiconductor wafers 失效
用于半导体晶片受控抛光和平坦化的系统和方法

  • Patent Title: System and method for controlled polishing and planarization of semiconductor wafers
  • Patent Title (中): 用于半导体晶片受控抛光和平坦化的系统和方法
  • Application No.: US09493978
    Application Date: 2000-01-28
  • Publication No.: US06340326B1
    Publication Date: 2002-01-22
  • Inventor: Rod KistlerYehiel Gotkis
  • Applicant: Rod KistlerYehiel Gotkis
  • Main IPC: B23B2900
  • IPC: B23B2900
System and method for controlled polishing and planarization of semiconductor wafers
Abstract:
A system and method for polishing semiconductor wafers includes a rotatable polishing pad movably positionable in a plurality of partially overlapping configurations with respect to a semiconductor wafer. A pad dressing assembly positioned coplanar, and adjacent, to the wafer provides in-situ pad conditioning to a portion of the polishing pad not in contact with the wafer. The method includes the step of radially moving the polishing pad with respect to the wafer.
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