发明授权
US06337269B1 Method of fabricating a dual damascene structure 有权
制造双镶嵌结构的方法

Method of fabricating a dual damascene structure
摘要:
The present invention fabricates a dual damascene structure. A passivation layer, a first dielectric layer, a second passivation layer, a second dielectric layer, a third passivation layer and a third dielectric layer are formed on the surface of the semiconductor wafer followed by etching the third dielectric layer to form a pattern of an upper trench of the dual damascene structure. Then the third passivation layer and the second dielectric layer are etched down to the surface of the second passivation layer so as to form a pattern of a via hole of the dual damascene structure. Thereafter, the third passivation layer and the second passivation layer not covered by the third dielectric layer and the second dielectric layer are removed. The third dielectric layer and the second passivation layer are used as hard masks to remove the second dielectric layer and the first dielectric layer until the surface of the first passivation layer. Finally, the second passivation layer and the first passivation layer not covered by the second dielectric layer and the first dielectric layer are removed to the surface of the conductive layer so completing the process of fabricating the dual damascene structure.
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