Invention Grant
- Patent Title: Method for measuring gate length and drain/source gate overlap
- Patent Title (中): 测量栅极长度和漏极/源极栅极重叠的方法
-
Application No.: US237540Application Date: 1999-01-26
-
Publication No.: US6166558APublication Date: 2000-12-26
- Inventor: Chun Jiang , Wei Long , Zicheng G. Ling , Yowjuang W. Liu
- Applicant: Chun Jiang , Wei Long , Zicheng G. Ling , Yowjuang W. Liu
- Applicant Address: CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: CA Sunnyvale
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L29/78
Abstract:
The invention provides a method and apparatus for calculating gate length and source/drain gate overlap, by measuring gate capacitance. The invention uses previously known fringe capacitance C.sub.fr and unit capacitance C.sub.OX. The invention measures gate capacitance C.sub.g, when the gate is accumulatively biased, and solves for overlap capacitance C.sub.OV using the equation C.sub.OV =(C.sub.g -2C.sub.fr)/2 or C.sub.OV =(C.sub.gg -C.sub.gb -2C.sub.fr)/2. The invention then measures the gate capacitance C.sub.g when the gate to source/drain voltage is set to inversion bias and a zero voltage is applied between the source/drain and the substrate, and solves for the channel capacitance C.sub.ch using the equation C.sub.ch =C.sub.g -2C.sub.fr -2C.sub.OV. The invention calculates the channel capacitance C.sub.ch where C.sub.ch =C.sub.g -2C.sub.fr -2C.sub.OV and then calculates gate length where gate length L.sub.g =(2C.sub.OV +C.sub.ch)/C.sub.OX and the effective gate length L.sub.eff =C.sub.ch /C.sub.OX. The invention further calculates source/drain gate overlap L.sub.OV, by setting L.sub.OV =C.sub.OV /C.sub.OX.
Public/Granted literature
- US5553817A Turn coordination inhibit for rotary wing aircraft control system Public/Granted day:1996-09-10
Information query
IPC分类:
