发明授权
- 专利标题: Method for fabricating electrostatic discharge protection device
- 专利标题(中): 静电放电保护装置的制造方法
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申请号: US268605申请日: 1999-03-15
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公开(公告)号: US6051457A公开(公告)日: 2000-04-18
- 发明人: Akira Ito
- 申请人: Akira Ito
- 申请人地址: FL Palm Bay
- 专利权人: Intersil Corporation
- 当前专利权人: Intersil Corporation
- 当前专利权人地址: FL Palm Bay
- 主分类号: H01L27/02
- IPC分类号: H01L27/02 ; H01L27/06 ; H01L29/866 ; H01L23/62
摘要:
An integrated circuit with a passive component and an ESD device in accordance with the present invention has: a P substrate; an N+ buried layer implanted in the P substrate; a cathode coupled to the N+ buried layer with an N area formed between the cathode and the N+ buried layer; an anode coupled to the N+ buried layer with a P area formed between the anode and the N+ buried layer; and a first P+ buried layer implanted in the N+ buried layer and below the P area to form a Zener diode. In an alternative embodiment, the ESD device may be incorporated in an integrated circuit with an active component.
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