Invention Grant
US5768479A Circuit layout technique with template-driven placement using fuzzy logic
失效
使用模糊逻辑的模板驱动放置的电路布局技术
- Patent Title: Circuit layout technique with template-driven placement using fuzzy logic
- Patent Title (中): 使用模糊逻辑的模板驱动放置的电路布局技术
-
Application No.: US710359Application Date: 1996-09-17
-
Publication No.: US5768479APublication Date: 1998-06-16
- Inventor: George J. Gadelkarim , Ted Vucurevich , William H. Kao
- Applicant: George J. Gadelkarim , Ted Vucurevich , William H. Kao
- Applicant Address: CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: CA San Jose
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F15/18
Abstract:
A method for generating a physical integrated circuit layout, using the similarity between a template and the physical layout as a metric. This automated template-driven layout methodology creates a physical integrated circuit layout which approximates the specified template as closely as practicably possible. The similarity of the positioning of circuit elements in a physical layout is improved with regard to the positioning of those same circuit elements in a template. The circuit elements' placement is incrementally improved by attaching a cost to each placement, with a lower cost reflecting a better match between circuit element placement in the physical layout and the template. Fuzzy logic concepts are employed to determine the cost of a given layout.
Public/Granted literature
- US5203766A Wrist brace Public/Granted day:1993-04-20
Information query