The level of the input vector signal (X+jY) is reduced to (X+jY)/.sqroot.2 in the overflow preventing circuit. A power arithmetic operating circuit squares the level-down input vector signal, to obtain a power value (X.sup.2 +Y.sup.2)/2. The initial value of the tap value (K) which is finally set to a reciprocal number value is multiplied two times by a multiplying circuit, thereby obtaining K.sup.2 (X+Y).sup.2 /2. Further, a differential circuit obtains an error signal (.DELTA.K)=1/2-K.sup.2 (X.sup.2 +Y.sup.2)/2 with a reference. An updating circuit updates the tap value (K) so that the error signal (.DELTA.K) is equal to 0. A loop arithmetic operation of the multiplication of the tap value, differential arithmetic operation, and updating of the tap value is repeated until the error signal (.DELTA.K) is converged to a predetermined value or less. The tap value (K) when it was converged is obtained as a reciprocal number value 1/.sqroot.(X.sup.2 +Y.sup.2) of the amplitude of the input vector signal.