In a gray-scale liquid crystal display panel of the type wherein first and second transparent substrates (1, 5) are disposed in parallel with liquid crystal (7) sealed in a space defined therebetween, the second substrate (5) is coated all over its inside surface with a transparent common electrode (6) and the first substrate (1) has on its inside surface pixels arranged in a matrix form and thin film transistors (8) each provided near one of the pixels, the pixels each include first and second spaced-apart subpixel electrodes (4.sub.1, 4.sub.2) formed on one side of an insulating layer (15) provided on the inside surface of the first substrate and a control capacitor electrode (2) formed on the other side of the insulating layer and covering the gap (GP) and overlapping the first and second subpixel electrodes (4.sub.1, 4.sub.2) over predetermined areas thereof. The first subpixel electrode (4.sub.1), the control capacitor electrode (2) and the second subpixel electrode (4.sub.2) constitute first, second and third liquid crystal capacitors (C.sub.LC1, C.sub.LC2, C.sub.LC3) between them and the common electrode (6) facing them. The first subpixel electrode (4.sub.1) and the control capacitor electrode (2) are coupled via a first control capacitor (C.sub.LC1), and the control capacitor electrode (2) and the second subpixel electrode (4.sub.2) are coupled via a second control capacitor (C.sub.LC2). The drain electrode of the thin film transistor is connected directly to the first subpixel electrode.