Invention Grant
US5389841A Differential transmission circuit 失效
差分传输电路

Differential transmission circuit
Abstract:
In a MOS integrated circuit is provided a first differential amplifying circuit for receiving complementary sets of input data at the gates of its two p-channel MOS transistors and for transmitting complementary sets of internal data. There is also provided a second differential amplifying circuit for receiving the complementary sets of internal data at the gates of its two n-channel MOS transistors and for transmitting complementary sets of output data. This realizes high-speed data transmission in which data transmission speed is independent of the generation of a clock signal. By preventing the flow of current from a power supply terminal to a ground terminal, a differential transmission circuit which consumes reduced current can be obtained.
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