发明授权
- 专利标题: Multiplier for processing multi-valued data
- 专利标题(中): 用于处理多值数据的乘数
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申请号: US984695申请日: 1992-12-02
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公开(公告)号: US5289399A公开(公告)日: 1994-02-22
- 发明人: Yukihiro Yoshida
- 申请人: Yukihiro Yoshida
- 申请人地址: JPX Osaka
- 专利权人: Sharp Kabushiki Kaisha
- 当前专利权人: Sharp Kabushiki Kaisha
- 当前专利权人地址: JPX Osaka
- 优先权: JPX3-323205 19911206
- 主分类号: G06F7/483
- IPC分类号: G06F7/483 ; G06F7/49 ; G06F7/506 ; G06F7/52 ; G06F7/523 ; G06F7/527
摘要:
A multiplier, which is capable of processing a multiplication of multi-valued data, includes a register transforming circuit (RC) for shifting data stored and outputting a plurality of data, a multiplying circuit connected to the register transforming circuit (RC) for multiplying the outputs from the register transforming circuit (RC) and an adding circuit connected to the multiplying circuit for adding the multiplied results according to a predetermined arithmetic rule based on logic to be used. The multiplier further includes an AND circuit element connected to the adding circuit for shifting and sending out the outputs from the adding circuit. A W register is connected to the adding circuit for storing the shifted outputs from the adding circuit according to the AND circuit element, and a further AND circuit element is connected to the W register for shifting and sending out the outputs from the W register. Another AND circuit element is connected to the further AND circuit element for further shifting the outputs from the further AND circuit element. Finally, a W register is connected to the further AND circuit element for storing the shifted output from the W register.
公开/授权文献
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