发明授权
US5218710A Audio signal processing system having independent and distinct data
buses for concurrently transferring audio signal data to provide
acoustic control
失效
具有独立和不同的数据总线的音频信号处理系统,用于同时传输音频信号数据以提供声控
- 专利标题: Audio signal processing system having independent and distinct data buses for concurrently transferring audio signal data to provide acoustic control
- 专利标题(中): 具有独立和不同的数据总线的音频信号处理系统,用于同时传输音频信号数据以提供声控
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申请号: US467403申请日: 1990-01-22
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公开(公告)号: US5218710A公开(公告)日: 1993-06-08
- 发明人: Makio Yamaki , Hiroyuki Ishihara , Norimichi Katsumura , Toshiyuki Naoe , Yukio Matsumoto , Kazuhiro Hayashi , Kazuo Watanabe
- 申请人: Makio Yamaki , Hiroyuki Ishihara , Norimichi Katsumura , Toshiyuki Naoe , Yukio Matsumoto , Kazuhiro Hayashi , Kazuo Watanabe
- 申请人地址: JPX Tokyo
- 专利权人: Pioneer Electronic Corporation
- 当前专利权人: Pioneer Electronic Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX1-156199 19890619; JPX1-156200 19890619; JPX1-156201 19890619; JPX1-159271 19890621; JPX1-159272 19890621; JPX1-163326 19890626; JPX1-163327 19890626
- 主分类号: G06F17/10
- IPC分类号: G06F17/10 ; H03G5/02
摘要:
An audio signal data processing system comprises input device for sequentially supplying an audio signal data, data memory control device for writing the audio signal data into a data memory and reading-out the data from the data memory, delay memory control device for sequentially reading-out the audio signal data from the data memory and storing the data into a location of a delay memory indicated by a writing address and for reading-out the audio signal data from a location of the delay memory indicated by a reading address and writing the data into the data memory, address designating devices for designating the writing and reading addresses, arithmetic device for multiplying a predetermined coefficient data to the audio signal data having been read-out by the delay memory control device and written into the data memory, and output device for providing the audio signal data in accordance with a result of operation by the arithmetic device. The data memory control device and the delay memory control device write and read the audio signal data into and from the data memory through data buses independent from each other.
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