发明授权
- 专利标题： A.C. Testing of logic arrays
- 专利标题（中）： 逻辑阵列测试
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申请号： US454533申请日： 1982-12-30
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公开(公告)号： US4503387A公开(公告)日： 1985-03-05
- 发明人: David L. Rutledge , Barbara J. Fisher
- 申请人： David L. Rutledge , Barbara J. Fisher
- 申请人地址： FL Melbourne
- 专利权人： Harris Corporation
- 当前专利权人： Harris Corporation
- 当前专利权人地址： FL Melbourne
- 主分类号： G01R31/3185
- IPC分类号： G01R31/3185 ; G01R15/12
摘要：
A test for the input and output circuitry of a logic array including means to disable the AND matrix and means selectively connecting the true and complement output of the input buffers directly to the output circuitry. Means are provided for activating and testing the exclusive OR in the output circuitry and selectively disable one of a combined input/output buffer pair.
信息查询
IPC分类:
