A single-chip microcomputer comprises a processor incorporating a computation process control unit and an operation execution unit. The microcomputer further comprises a memory unit, an interface, a buffer storage cell, and a unit to control exchange of information transmitted through a system line. All these units and the processor with its computation process control unit and operation excution unit are interconnected by a bidirectional bus. The processor also includes a buffer storage cell, a processor information exchange control unit, and an address comparator, which are all interconnected. The single-chip microcomputer further contains a bus arbiter and a system line arbiter which are connected to the unit to control exchange of information transmitted through the system line. Finally, the microcomputer includes a system line address comparator connected to the processor and buffer storage cell. The single-chip microcomputer according to the invention can be combined into a system with a common memory field.