A sense amplifier/latch circuit for a Metal Nitride Oxide (MNOS) Block Orgaized Random Access Memory (BORAM) with analog memory retention interrogation capabilities. The sense amplifier/latch circuit includes the associative memory transistors as an integral part of the latch as well as circuitry for increasing the switching speed of the sense latch in response to the differing conductances of the memory transistors when a row address voltage is applied to their gates.