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US4132573A Method of manufacturing a monolithic integrated circuit utilizing epitaxial deposition and simultaneous outdiffusion 失效
使用外延沉积和同时扩散的制造单片集成电路的方法

Method of manufacturing a monolithic integrated circuit utilizing
epitaxial deposition and simultaneous outdiffusion
Abstract:
A monolithic integrated circuit is formed having semiconductor components disposed in surface regions of a semiconductor body, said regions being electrically isolated from the remaining semiconductor body by a pn-junction plane. The regions into which the semiconductor components are formed are electrically isolated by heavily doping surface areas of a substrate with phosphorus, antimony and/or arsenic impurities which are of the opposite conductivity from the substrate. After said doping, an epitaxial layer having a conductivity opposite to that of the substrate is formed over the entire substrate surface with a doping concentration lower than that of the substrate so that during subsequent high temperature processing steps, the substrate impurity out-diffuses into the epitaxial layer and the phosphorus of the heavily doped surface areas diffuses downwardly into the substrate to form a step-like pn-junction surface alternately extending into the substrate and into the epitaxial layer. During subsequent processing operations, an impurity of the same conductivity type as used in the substrate is diffused downwardly from the surface of the epitaxial layer to meet the out-diffused substrate impurity to complete the isolation of surface regions of the semiconductor body into which the semiconductor components are formed.
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