A chip package having a package substrate including a top surface. A first chip module and a second chip module are mounted above the top surface of the package substrate. A first interposer is disposed between the package substrate and the first and second chip modules and includes a glass interposer. The first interposer couples the first and second chip modules to the package substrate. An interconnect bridge is disposed in a cavity of the glass interposer. The interconnect bridge includes circuitry that connects a circuitry of the first chip module to a circuitry of the second chip module.