• 专利标题: SIGNAL LOOP BUSBARS AND SEMICONDUCTOR POWER MODULES INCLUDING THE SAME AND PROCESSES OF IMPLEMENTING THE SAME
  • 申请号: US18305976
    申请日: 2023-04-24
  • 公开(公告)号: US20240356322A1
    公开(公告)日: 2024-10-24
  • 发明人: Amol DESHPANDE
  • 申请人: WOLFSPEED, INC.
  • 申请人地址: US NC Durham
  • 专利权人: WOLFSPEED, INC.
  • 当前专利权人: WOLFSPEED, INC.
  • 当前专利权人地址: US NC Durham
  • 主分类号: H02G5/02
  • IPC分类号: H02G5/02 H05K7/02
SIGNAL LOOP BUSBARS AND SEMICONDUCTOR POWER MODULES INCLUDING THE SAME AND PROCESSES OF IMPLEMENTING THE SAME
摘要:
A power module having a plurality of bus bars. The power module and/or bus bars being configured with features to reduce inductance; and/or the power module and/or bus bars are configured with features to have a substantially equivalent inductance.
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