Invention Publication
- Patent Title: GLASS PACKAGE SUBSTRATE WITH CHIP DISAGGREGATION INTERFACE
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Application No.: US18138440Application Date: 2023-04-24
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Publication No.: US20240355752A1Publication Date: 2024-10-24
- Inventor: Telesphor KAMGAING
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L23/15

Abstract:
Embodiments disclosed herein include a package substrate. In an embodiment, the package substrate comprises a core with a first surface and a second surface, where the core comprises a glass layer. In an embodiment, a first routing layer is over the first surface of the core, where the first routing layer comprises traces with a first width. In an embodiment, a second routing layer is over the second surface of the core, where the second routing layer comprises traces with a second width that is smaller than the first width.
Information query
IPC分类: