Invention Publication
- Patent Title: SOLDER BARRIER CONTACT FOR AN INTEGRATED CIRCUIT
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Application No.: US18357379Application Date: 2023-07-24
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Publication No.: US20240324109A1Publication Date: 2024-09-26
- Inventor: Uthayarajan A/L Rasalingam , Hudzaifah Yousof Bin Humayun , Babu Krishnamoorthy
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: H05K3/34
- IPC: H05K3/34 ; H05K1/18

Abstract:
A grid of connection points or surface mount features electrically and/or communicatively couples a first computing component to a second computing component. The grid of connection points include a first connection point type having a first structure and a second connection point type having a second structure. In an example, the first connection point type is a solder ball that is associated with a single signal pin and the second connection point type is a solder bar that is associated with multiple signal pins. One or more of the second connection point types are positioned at and/or around a perimeter of the first computing component, which reduces strain, stress and/or other mechanical forces on the first connection point types and/or on the first computing component and/or the second computing component.
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