A chip of film package comprises a film substrate having a chip mounting region, an inner lead bonding region arranged within the chip mounting region, and an outer lead bonding region spaced apart from the inner lead bonding region in a first direction, and providing upper and lower surfaces opposite to each other, a first upper wiring pattern arranged on the upper surface of the film substrate and extending in the first direction from the inner lead bonding region to the outer lead bonding region, a second upper wiring pattern spaced apart from the first upper wiring pattern in the first direction, an upper solder resist layer covering an upper surface of the first upper wiring pattern; and a lower solder resist layer covering an upper surface of the lower wiring pattern.