According to one embodiment, a semiconductor memory device includes a first memory string including a first memory cell transistor; a second memory string including a second memory cell transistor; a first word line commonly coupled to a gate of each of the first memory cell transistor and the second memory cell transistor; and a control circuit, wherein during a first read operation of reading data from the first memory string, a threshold voltage of the first memory cell transistor is less than a first voltage, a threshold voltage of the second memory cell transistor is equal to or greater than the first voltage, and the control circuit is configured to supply a voltage equal to or less than the first voltage to the first word line.