Invention Publication
- Patent Title: INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF
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Application No.: US18124591Application Date: 2023-03-22
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Publication No.: US20240243057A1Publication Date: 2024-07-18
- Inventor: Da-Jun Lin , Bin-Siang Tsai , Fu-Yu Tsai
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu City
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu City
- Priority: TW 2102158 2023.01.18
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L23/00 ; H01L27/08

Abstract:
An integrated circuit includes a substrate, an interconnection layer, an insulation layer, a metal bump structure, and a metal-insulator-metal capacitor. The interconnection layer is disposed above the substrate. The interconnection layer includes an interlayer dielectric layer and an interconnection structure disposed in the interlayer dielectric layer. The insulation layer is disposed on the interconnection layer, the metal bump structure is disposed on the insulation layer, and the metal-insulator-metal capacitor is disposed conformally on the metal bump structure and the insulation layer. A manufacturing method of the integrated circuit includes the following steps.
The interconnection layer is formed above the substrate. The insulation layer is formed on the interconnection layer, the metal bump structure is formed on the insulation layer, and the metal-insulator-metal capacitor is formed conformally on the metal bump structure and the insulation layer.
The interconnection layer is formed above the substrate. The insulation layer is formed on the interconnection layer, the metal bump structure is formed on the insulation layer, and the metal-insulator-metal capacitor is formed conformally on the metal bump structure and the insulation layer.
Information query
IPC分类: