- 专利标题: SEMICONDUCTOR PACKAGE AND RELATED METHODS OF MANUFACTURING
-
申请号: US18406832申请日: 2024-01-08
-
公开(公告)号: US20240145340A1公开(公告)日: 2024-05-02
- 发明人: Jayaganasan Narayanasamy , Angel Enverge , Chii Shang Hong , Chee Ming Lam , Sanjay Kumar Murugan , Subaramaniym Senivasan
- 申请人: Infineon Technologies AG
- 申请人地址: DE Neubiberg
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Neubiberg
- 主分类号: H01L23/433
- IPC分类号: H01L23/433 ; H01L23/00 ; H01L23/495 ; H01L23/498
摘要:
A molded semiconductor package includes: a semiconductor die; a substrate attached to a first side of the semiconductor die; a plurality of leads electrically connected to a second side of the semiconductor die opposite the first side; a heat sink clip thermally coupled to a pad at the second side of the semiconductor die; and a molding compound encapsulating the die, part of the leads, part of the heat sink clip, and at least part of the substrate. The molding compound has a first main side, a second main side opposite the first main side and at which the substrate is disposed, and an edge extending between the first main side and the second main side. The leads protrude from opposing first and second faces of the edge of the molding compound. The heat sink clip protrudes from opposing third and fourth faces of the edge of the molding compound.
信息查询
IPC分类: