Invention Publication
- Patent Title: VERTICAL NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL STRINGS
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Application No.: US18335492Application Date: 2023-06-15
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Publication No.: US20240096415A1Publication Date: 2024-03-21
- Inventor: Changseok LEE , Minhyun LEE , Seunggeol NAM
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR 20220116627 2022.09.15
- Main IPC: G11C16/04
- IPC: G11C16/04 ; H01L29/10 ; H01L29/18 ; H01L29/20 ; H10B41/10 ; H10B41/27 ; H10B41/35 ; H10B43/10 ; H10B43/27 ; H10B43/35

Abstract:
A nonvolatile memory device may include a channel layer extending in a first direction; a plurality of gate electrodes and a plurality of spacers alternately arranged with each other in the first direction, and a gate insulating layer extending in the first direction. Each of the plurality of gate electrodes and each of the plurality of spacers may extend in a second direction crossing the first direction. The gate insulating layer may extend in the first direction. The gate insulating layer may be between the channel layer and the plurality of gate electrodes. The channel layer may include a two-dimensional semiconductor material having an electrically p-type property.
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