- 专利标题： SEMICONDUCTOR DEVICE INCLUDING TRANSISTORS SHARING GATES WITH STRUCTURES HAVING REDUCED PARASITIC CIRCUIT
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申请号： US18508015申请日： 2023-11-13
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公开(公告)号： US20240079408A1公开(公告)日： 2024-03-07
- 发明人: Yi-Feng CHANG , Po-Lin PENG , Jam-Wem LEE
- 申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址： TW Hsinchu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： TW Hsinchu
- 分案原申请号： US16525275 2019.07.29
- 主分类号： H01L27/092
- IPC分类号： H01L27/092 ; H01L21/8238 ; H01L27/02 ; H01L29/06 ; H01L29/10 ; H01L29/87
摘要：
A method includes the following operations: disconnecting at least one of drain regions that are formed on a first active area, of first transistors, from a first voltage; and disconnecting at least one of drain regions that are formed on a second active area, of second transistors coupled to the first transistors from a second voltage. The at least one of drain regions of the second transistors corresponds to the at least one of drain regions of the first transistors.
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