A low-power phase interpolator circuit has a phase generator that receives an input clock signal and uses the input clock signal to generate multiple intermediate clock signals with different phase shifts; a phase rotator circuit that outputs phase-adjusted clock signals, each phase-adjusted clock signal having a phase that lies within a range bounded by phases of two of the intermediate clock signals; a frequency doubler circuit that receives a plurality of the phase-adjusted clock signals and outputs two frequency-doubled clock signals having a 180° phase difference; and a quadrature clock generation circuit that receives the two frequency-doubled clock signals and provides four output signals that include in-phase and quadrature versions of the two frequency-doubled clock signals.