- 专利标题: CONDUCTIVE STRUCTURES AND METHODS OF FORMING THE SAME
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申请号: US17805605申请日: 2022-06-06
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公开(公告)号: US20230395429A1公开(公告)日: 2023-12-07
- 发明人: Kan-Ju LIN , Hao-Heng LIU , Chien CHANG , Hung-Yi HUANG , Harry CHIEN
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/522 ; C23C16/56 ; C23C16/14
摘要:
Depositing a seed layer after formation of the MD in order to reduce or prevent epitaxial growth of the seed layer toward the MD. For example, the seed layer may be deposited using CVD and conformal dry etching. In some implementations, the seed layer may be formed of ruthenium (Ru), molybdenum (Mo), or tungsten (W). Accordingly, the seed layer helps reduce or prevent seam formation in the VG, which reduces resistance of the VG by allowing for bottom-up metal growth. Additionally, current leakage from the VG to the MD is reduced or even prevented. As a result, device performance and efficiency are increased and breakdown voltage of the gate structure is also increased. Additionally, because electrical shorts are less likely, yield is increased, which conserves power, raw materials, and processing resources that otherwise would have been consumed during manufacture.
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