Invention Application
- Patent Title: ZERO OPERAND INSTRUCTION CONVERSION FOR ACCELERATING SPARSE COMPUTATIONS IN A CENTRAL PROCESSING UNIT PIPELINE
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Application No.: US17384646Application Date: 2021-07-23
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Publication No.: US20230024089A1Publication Date: 2023-01-26
- Inventor: John Kalamatianos , Ganesh Dasika
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F9/30
- IPC: G06F9/30
Abstract:
A processing device includes a zero detection circuit to determine that an operand of a first instruction is zero and instruction conversion logic coupled with the zero detection circuit to, in response to the zero detection circuit determining that the operand is zero, convert the first instruction to a register move instruction executable by the processing device.
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