Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
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Application No.: US17213241Application Date: 2021-03-26
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Publication No.: US20220310411A1Publication Date: 2022-09-29
- Inventor: Jiun-Ting Chen , Chih-Wei Wu , Szu-Wei Lu , Tsung-Fu Tsai , Ying-Ching Shih , Ting-Yu Yeh , Chen-Hsuan Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/13 ; H01L23/31 ; H01L25/065 ; H01L25/18 ; H01L21/304

Abstract:
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
Public/Granted literature
- US11990351B2 Semiconductor package and manufacturing method thereof Public/Granted day:2024-05-21
Information query
IPC分类: