Invention Application
- Patent Title: STACKED SEMICONDUCTOR PACKAGE
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Application No.: US16992895Application Date: 2020-08-13
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Publication No.: US20210125955A1Publication Date: 2021-04-29
- Inventor: JIHWAN SUH , UN-BYOUNG KANG , TAEHUN KIM , HYUEKJAE LEE , JIHWAN HWANG , SANG CHEON PARK
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2019-0132171 20191023
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L25/18

Abstract:
A semiconductor package includes a substrate, a first semiconductor chip disposed on the substrate, and a second semiconductor chip disposed on a top surface of the first semiconductor chip. The first semiconductor chip includes a conductive pattern disposed on the top surface of the first semiconductor chip and a first protective layer covering the top surface of the first semiconductor chip and at least partially surrounds the conductive pattern. The second semiconductor chip includes a first pad that contacts a first through electrode on a bottom surface of the second semiconductor chip. A second protective layer surrounds the first pad and covers the bottom surface of the second semiconductor chip. A third protection layer fills a first recess defined in the second protective layer to face the inside of the second protective layer. The first protective layer and the third protective layer contact each other.
Public/Granted literature
- US11508685B2 Stacked semiconductor package Public/Granted day:2022-11-22
Information query
IPC分类: