Invention Application
- Patent Title: Integrated Circuit Package and Method
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Application No.: US17120859Application Date: 2020-12-14
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Publication No.: US20210098323A1Publication Date: 2021-04-01
- Inventor: Chen-Hua Yu , Sung-Feng Yeh , Ming-Fa Chen , Hsien-Wei Chen , Tzuan-Horng Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/538 ; H01L23/48 ; H01L23/522

Abstract:
A device package includes a first die directly bonded to a second die at an interface, wherein the interface comprises a conductor-to-conductor bond. The device package further includes an encapsulant surrounding the first die and the second die and a plurality of through vias extending through the encapsulant. The plurality of through vias are disposed adjacent the first die and the second die. The device package further includes a plurality of thermal vias extending through the encapsulant and a redistribution structure electrically connected to the first die, the second die, and the plurality of through vias. The plurality of thermal vias is disposed on a surface of the second die and adjacent the first die.
Public/Granted literature
- US11443995B2 Integrated circuit package and method Public/Granted day:2022-09-13
Information query
IPC分类: