Invention Application
- Patent Title: Read Assist Circuitry for Memory Applications
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Application No.: US17107559Application Date: 2020-11-30
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Publication No.: US20210082496A1Publication Date: 2021-03-18
- Inventor: Rahul Mathur , Vivek Asthana , Ankur Garcia Goel , Nikhil Kaushik , Rachit Ahuja , Bikas Maiti , Yew Keong Chong
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Main IPC: G11C11/419
- IPC: G11C11/419 ; G11C11/418

Abstract:
Various implementations described herein are directed to an integrated circuit having a wordline driver coupled to a bitcell via a wordline. The integrated circuit may include a read assist transistor coupled to the wordline between the wordline driver and the bitcell. While activated, the read assist transistor may generate an adaptive underdrive on the wordline, the level of which depends on the process, temperature and voltage of operation of the memory, when the wordline is selected and driven by the wordline driver.
Public/Granted literature
- US11475944B2 Read assist circuitry for memory applications Public/Granted day:2022-10-18
Information query
IPC分类: