A performance analysis system and method for analyzing processing performance of a processing device. A picker module is placed in the processing device to capture a plurality of pieces of time information of a unit circuit of each of a plurality of tasks in the processing device during total execution time of processing the plurality of tasks. A calculation circuit performs an interval analysis operation on the time information. The interval analysis operation includes: calculating an overlap period between a current task and a previous task; and counting time occupied by the unit circuit during the total execution time of processing the tasks by the processing device according to a relation between the current time interval of the current task corresponding to the unit circuit and the overlap period.