- 专利标题: DIGITAL CAPACITIVE ISOLATOR
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申请号: US16526081申请日: 2019-07-30
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公开(公告)号: US20210036896A1公开(公告)日: 2021-02-04
- 发明人: Craig S. Petrie , Srujan Shivanakere
- 申请人: Allegro MicroSystems, LLC
- 申请人地址: US NH Manchester
- 专利权人: Allegro MicroSystems, LLC
- 当前专利权人: Allegro MicroSystems, LLC
- 当前专利权人地址: US NH Manchester
- 主分类号: H04L25/02
- IPC分类号: H04L25/02 ; H02M3/06
摘要:
An isolation circuit that isolates a driver circuit that is biased at a first common mode voltage from a detection circuit that is biased at a second common mode voltage using isolation capacitors. The detection circuit includes a transimpedance amplifier having improved susceptibility to transient common-mode input signals and improved insensitivity to parasitic capacitance on the isolation capacitor terminals. Included within the transimpedance amplifier are circuits for mirroring current to convert the input current from the isolation capacitors into a voltage value and to amplify that voltage value. The transimpedance amplifier outputs a differential voltage value that is held by a latch circuit so that a comparator in the detection circuit can process the differential voltage value and output a differential signal with fully restored logic levels.
公开/授权文献
- US11228466B2 Digital capacitive isolator 公开/授权日:2022-01-18
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