- 专利标题： METHOD OF FORMING SOURCE/DRAIN REGIONS OF TRANSISTORS
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申请号： US16658597申请日： 2019-10-21
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公开(公告)号： US20200051871A1公开(公告)日： 2020-02-13
- 发明人: Yu-Hung CHENG , Ching-Wei TSAI , Yeur-Luen TU , Tung-I LIN , Wei-Li CHEN
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238 ; H01L29/78 ; H01L29/66 ; H01L27/092
摘要：
A method for fabricating a semiconductor device includes providing a first wafer comprising a substrate and a first semiconductor material layer, bonding the first wafer to a second wafer, the second wafer comprising a sacrificial layer and a second semiconductor material layer, removing the sacrificial layer, patterning the bonded wafers to create a first structure and a second structure, removing the second semiconductor material from the first structure, forming a first type of transistor in the first semiconductor material of the first structure, and forming a second type of transistor in the second semiconductor material of the second structure.
公开/授权文献
- US10971406B2 Method of forming source/drain regions of transistors 公开/授权日：2021-04-06
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