Invention Application
- Patent Title: LOW LATENCY STATISTICAL DATA BUS INVERSION FOR ENERGY REDUCTION
-
Application No.: US15475571Application Date: 2017-03-31
-
Publication No.: US20180285304A1Publication Date: 2018-10-04
- Inventor: Vivek Kozhikkottu , Shankar Ganesh Ramasubramanian , Kon-Woo Kwon , Dinesh Somasekhar
- Applicant: Intel Corporation
- Main IPC: G06F13/42
- IPC: G06F13/42 ; G06F13/36 ; G06F13/40

Abstract:
In accordance with embodiments disclosed herein, there is provided systems and methods for low latency statistical data bus inversion (DBI) for energy reduction. A transmitting component includes a transmitter and a statistical DBI circuit. The statistical DBI circuit is to receive current data to be transmitted on a data bus and is to store previous data transmitted on the data bus. The statistical DBI circuit includes inverting logic to invert bits of the current data before transmission in response to a control signal. The statistical DBI circuit includes adjacent pattern prediction logic to receive a difference vector including a comparison of the previous data and the current data, determine whether the difference vector includes a pattern predicting transmission of the current data with toggle is more efficient than without toggle, and output the control signal in the first state indicating the pattern was detected.
Public/Granted literature
- US10853300B2 Low latency statistical data bus inversion for energy reduction Public/Granted day:2020-12-01
Information query