Invention Application
- Patent Title: METHOD OF FABRICATING ISOLATION STRUCTURE
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Application No.: US15384940Application Date: 2016-12-20
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Publication No.: US20180108563A1Publication Date: 2018-04-19
- Inventor: Chieh-Te Chen , Hsien-Shih Chu , Ming-Feng Kuo , Fu-Che Lee , Chien-Ting Ho , Chiung-Lin Hsu , Feng-Yi Chang , Yi-Wang Zhan , Li-Chiang Chen , Chien-Cheng Tsai , Chin-Hsin Chiu
- Applicant: United Microelectronics Corp. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsinchu CN Fujian Province
- Assignee: United Microelectronics Corp.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: United Microelectronics Corp.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsinchu CN Fujian Province
- Priority: CN201610903787.1 20161017
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/308

Abstract:
A method of fabricating an isolation structure is provided. A first oxide layer and a first, second, and third hard mask layers are formed on a substrate. A patterned third hard mask layer is formed. Second oxide layers are formed on sidewalls of the patterned third hard mask layer and a fourth hard mask layer is formed between the second oxide layers. The second oxide layers and the second hard mask layer are removed using the patterned third hard mask layer and the fourth hard mask layer as a mask, to form a patterned second hard mask layer. The patterned third hard mask layer and the fourth hard mask layer are removed. A portion of the patterned second hard mask layer is removed to form trench patterns. A patterned first hard mask layer and first oxide layer, and trenches located in the substrate are defined. An isolation material is formed.
Public/Granted literature
- US10199258B2 Method of fabricating isolation structure Public/Granted day:2019-02-05
Information query
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