Invention Application
- Patent Title: METHOD AND SYSTEM FOR ASYNCHRONOUS SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTOR (ADC) ARCHITECTURE
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Application No.: US15674700Application Date: 2017-08-11
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Publication No.: US20170346500A1Publication Date: 2017-11-30
- Inventor: Xuefeng Chen , Kok Lim Chan , Eric Fogleman , Sheng Ye
- Applicant: MaxLinear, Inc.
- Main IPC: H03M1/38
- IPC: H03M1/38 ; H03M1/06 ; H03M1/12 ; H03M1/46

Abstract:
A system for processing signals may be configured to detect occurrence of particular errors, comprising meta-stability events, during digital conversion to analog signals, and to handle any detected meta-stability event, such as by adjusting at least a portion of a corresponding digital output based on detection of the meta-stability event. The adjusting of the digital output may comprise setting at least the portion of the digital output, such as to one of a plurality of predefined digital values or patterns. The system may comprise a code generator for generating and/or outputting the predefined digital values or patterns. The system may comprise a selector for adaptively selecting, for portions of the digital output, between output of normal processing path and between predefined values or patterns.
Information query
IPC分类: