- 专利标题: APPARATUSES AND METHODS FOR VARIABLE LATENCY MEMORY OPERATIONS
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申请号: US15667358申请日: 2017-08-02
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公开(公告)号: US20170329534A1公开(公告)日: 2017-11-16
- 发明人: Graziano Mirichigni , Daniele Balluchi , Luca Porzio
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G06F3/06
- IPC分类号: G06F3/06
摘要:
Apparatuses and methods for variable latency memory operations are disclosed herein. An example apparatus may include a memory configured to provide first information during a variable latency period indicating the memory is not available to perform a command, wherein the first information is indicative of a remaining length of the variable latency period, the remaining length is one of a relatively short, normal, or long period of time, the memory configured to provide second information in response to receiving the command after the latency period.
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