发明申请
- 专利标题: CHIP MOUNTING STRUCTURE
- 专利标题(中): 芯片安装结构
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申请号: US15255588申请日: 2016-09-02
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公开(公告)号: US20170005053A1公开(公告)日: 2017-01-05
- 发明人: Akihiro HORIBE , Keiji MATSUMOTO , Keishi OKAMOTO , Kazushige TORIYAMA
- 申请人: International Business Machines Corporation
- 主分类号: H01L23/00
- IPC分类号: H01L23/00
摘要:
Highly reliable chip mounting is accomplished by using a substrate having such a shape that a stress exerted on a flip-chip-connected chip can be reduced, so that the stress exerted on the chip is reduced and separation of an interlayer insulating layer having a low dielectric constant (low-k) is minimized. Specifically, in a chip mounting structure, a chip including an interlayer insulating layer having a low dielectric constant (low-k) is flip-chip connected to a substrate via bumps is shown. In the chip mounting structure, the substrate has such a shape that a mechanical stress exerted on the interlayer insulating layer at corner portions of the chip due to a thermal stress is reduced, the thermal stress occurring due to a difference in coefficient of thermal expansion between the chip and the substrate.
公开/授权文献
- US09893031B2 Chip mounting structure 公开/授权日:2018-02-13
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