发明申请
- 专利标题： SEMICONDUCTOR PACKAGES INCLUDING INTERCONNECTION MEMBERS
- 专利标题（中）： 包含互连成员的半导体封装
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申请号： US14831324申请日： 2015-08-20
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公开(公告)号： US20160307867A1公开(公告)日： 2016-10-20
- 发明人: Jung Tae JEONG
- 申请人： SK hynix Inc.
- 优先权： KR10-2015-0052729 20150414
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/498 ; H01L23/10
摘要：
A semiconductor package may include a main substrate, a sub-substrate spaced apart from the main substrate by a gap, and a semiconductor chip disposed on the main substrate. The semiconductor package may include an interconnection member configured to connect the semiconductor chip to the sub-substrate and including twisted wires of a plurality of strands. The semiconductor package may include a main molding member covering the main substrate and the semiconductor chip, and a sub-molding member covering the sub-substrate. The semiconductor package may include a stress buffer layer configured to fill the gap between the main substrate and the sub-substrate, and surround the interconnection member.
公开/授权文献
- US09478515B1 Semiconductor packages including interconnection members 公开/授权日：2016-10-25
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