发明申请
- 专利标题: SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF
- 专利标题(中): 半导体布置及其形成
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申请号: US14208310申请日: 2014-03-13
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公开(公告)号: US20150262933A1公开(公告)日: 2015-09-17
- 发明人: Jiun Yi Wu , Hsueh-Lung Cheng , Shou-Yi Wang
- 申请人: Taiwan Semiconductor Manufacturing Company Limited
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人: Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/522
- IPC分类号: H01L23/522 ; H01L23/532 ; H01L21/66 ; H01L23/00 ; H01L21/768
摘要:
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a metal trace under at least a first dielectric layer and a second dielectric layer. The metal trace is connected to a ball connection by a first via in the first dielectric layer and second via in the second dielectric layer. The metal trace is connected to a test pad at a connection point, where the connection point is under the first dielectric layer. The metal trace under at least the first dielectric layer and the second dielectric layer has increased stability and decreased susceptibility to cracking in least one of the ball connection, the connection point, the first via or the second via as compared to a metal trace that is not under at least a first dielectric layer and a second dielectric layer.
公开/授权文献
- US09646928B2 Semiconductor arrangement and formation thereof 公开/授权日:2017-05-09
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