Invention Application
US20150255568A1 FABRICATION PROCESS FOR MITIGATING EXTERNAL RESISTANCE AND INTERFACE STATE DENSITY IN A MULTIGATE DEVICE 有权
减少外部电阻和接口状态密度在多设备中的制造工艺

FABRICATION PROCESS FOR MITIGATING EXTERNAL RESISTANCE AND INTERFACE STATE DENSITY IN A MULTIGATE DEVICE
Abstract:
A method for fabricating a multigate device includes forming a fin on a substrate of the multigate device, the fin being formed of a semiconductor material, growing a first conformal epitaxial layer directly on the fin and substrate, wherein the first conformal epitaxial layer is undoped or lightly doped, growing a second conformal epitaxial layer directly on the first conformal epitaxial layer, wherein the second conformal epitaxial layer is highly doped, selectively removing a portion of the second epitaxial layer to expose a portion of the first conformal epitaxial layer and thereby form a trench, and forming a gate within the trench.
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