Invention Application
- Patent Title: FABRICATION METHOD OF SEMICONDUCTOR PACKAGE
- Patent Title (中): 半导体封装的制造方法
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Application No.: US14604128Application Date: 2015-01-23
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Publication No.: US20150132893A1Publication Date: 2015-05-14
- Inventor: Chien-Feng Chan , Chun-Tang Lin , Yi-Che Lai
- Applicant: Siliconware Precision Industries Co., Ltd.
- Priority: TW101143204 20121120
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/78

Abstract:
A semiconductor package is provided. The semiconductor package includes a semiconductor chip having opposite first and second surfaces; an RDL structure formed on the first surface of the semiconductor chip and having opposite third and fourth surfaces and a plurality of first conductive through holes penetrating the third and fourth surfaces thereof, wherein the RDL structure is formed on the semiconductor chip through the fourth surface thereof and electrically connected to the semiconductor chip through a plurality of first conductive elements, and the third surface of the RDL structure has a redistribution layer formed thereon; a plurality of conductive bumps formed on the redistribution layer; and an encapsulant formed on the first surface of the semiconductor chip for encapsulating the RDL structure, wherein the conductive bumps are embedded in and exposed from the encapsulant. The invention effectively prevents warpage of the semiconductor package and improves the electrical connection significantly.
Public/Granted literature
- US09269693B2 Fabrication method of semiconductor package Public/Granted day:2016-02-23
Information query
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