Invention Application
US20140239509A1 Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV
有权
半导体器件和在TSV周围形成芯片周围的顶侧和底侧互连结构的方法
- Patent Title: Semiconductor Device and Method of Forming Topside and Bottom-side Interconnect Structures Around Core Die with TSV
- Patent Title (中): 半导体器件和在TSV周围形成芯片周围的顶侧和底侧互连结构的方法
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Application No.: US14267777Application Date: 2014-05-01
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Publication No.: US20140239509A1Publication Date: 2014-08-28
- Inventor: Sun Mi Kim , OhHan Kim , KyungHoon Lee
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/00 ; H01L23/00

Abstract:
A semiconductor device has a core semiconductor device with a through silicon via (TSV). The core semiconductor device includes a plurality of stacked semiconductor die and semiconductor component. An insulating layer is formed around the core semiconductor device. A conductive via is formed through the insulating layer. A first interconnect structure is formed over a first side of the core semiconductor device. The first interconnect structure is electrically connected to the TSV. A second interconnect structure is formed over a second side of the core semiconductor device. The second interconnect structure is electrically connected to the TSV. The first and second interconnect structures include a plurality of conductive layers separated by insulating layers. A semiconductor die is mounted to the first interconnect structure. The semiconductor die is electrically connected to the core semiconductor device through the first and second interconnect structures and TSV.
Public/Granted literature
Information query
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